The present invention relates to a low voltage-controlled, stand-by electronic circuit with delayed switch off, in particular of the type used to interrupt or switch off the connection of electronic user devices comprising components which are susceptible to a sharp switching off.
As is known, electronic switch-off circuits which comprise a so-called stand-by unit are used to interrupt current flowing in electronic components; said stand-by circuits keep said components live - with practically no current absorption - even when the apparatus comprising said components is switched off.
A stand-by switch-off circuit is a two-state device (i.e. it can be either in the "on" position or in the "off" position) and may be voltage-controlled; in general the stand-by switching voltage is set according to the various technologies. For example, if the stand-by circuit is TTL-compatible, the switch-off voltage level should be lower than 0.8 V, while the switch-on voltage level should be higher than 2.0 V.
An example of the use of a stand-by circuit is the switching off of a radio receiver or television set by means of a remote control: the radio receiver or television set remains connected to the power supply but its current absorption is practically nil.
In this case however a problem arises if the radio receiver or television set is suddenly switched off, causing an unpleasant acoustic effect.
In order to solve this problem, it is known to combine a stand-by circuit with a delay circuit; the delay thus obtained extends the switch-off time of said components. Such a combination of a stand-by circuit and of a delay circuit is known in the literature (see e.g. FIG. 1).
The known solution teaches the use of a switching circuit connecting the power supply Vcc pin and the stand-by pin. However, this solution entails the use of two circuits (the stand-by circuit and the circuit for switching said stand-by circuit) and therefore entails a lower integration. Otherwise, if the switching function is integrated, the delay circuit should be connected to an external capacitor C1, thereby requiring an opposite pin to this end, which is considered disadvantageous.
A different solution is mentioned in the SGS Data Book, and in particular with reference to the integrated component termed TDA 7360 by SGS. A typical embodiment of the proposed solution is illustrated in FIG. 2. The block 1 and the block 2 are external (see the dot-and-dash lines which define block E). Control block 2, which is either CMOS or TTL-compatible, controls opening and closing of switching block 1, which in turn controls the operation of the current sources comprised in the user (one of which is schematically represented in FIG. 2 by transistor Q10): when block 1 is in the "on" position (i.e. the switch is closed) the transistor Q1 of the delay stage (also comprising resistors R, R1, R2, capacitor C2 and diode D1) is on and the output voltage Iout is not zero. The capacitor C2 is charged at a voltage Vc which is greater than the threshold voltage of said user circuit or equal thereto; said threshold voltage is given by the sum of the voltage drops Vbe (base-to-emitter voltage transistor Q1)+Vr (voltage across the resistor R)+Vd (voltage across diode D1). When block 1 is in its "off" position (i.e. open), the capacitor C2 discharges with the time constant Td which is equal to R1.C2 (see FIG. 3): therefore Vc decreases (as also shown in FIG. 3). When Vc drops below the threshold voltage of the circuit formed by Q1, R and D1, the transistor Q1 switches to the "off" condition, thereby switching off the generic current source Q0 so that its output current Iout is nil. The delay time TD is illustrated in FIG. 3.
The described known circuit has some disadvantages, among which a high switch-off threshold voltage may be mentioned.